FPGA Prototyping of Manycore Multinode Systems for Irregular Applications

Knowledge discovery applications are an emerging class of irregular applications that exploit graph-based data structures, present poor locality and analyze very big data sets that require multi-node systems for processing. Current commodity clusters, which exploit cachebased processors, usually perform poorly with these applications. To address their requirements, full-custom machines, like the Cray XMT, or software approaches, such as several distributed graph libraries have been proposed. In this paper we discuss a set of hardware and software components that makes manycore architectures, composed of off-the-shelf cores, more efficient with these applications. The components enable support for latency tolerance, scrambled global address space, finegrained synchronization, and software multi-threading with hardware scheduling. We validate our approach with a 4-node FPGA prototype that enables exploring tradeoffs among network bandwidth, number of cores per node and threads per core. The prototype has been presented in various FPGA-related venues. We employ two typical irregular kernels (pointer chasing and Breadth First Search), showing that the the proposed components allow higher utilization of the network bandwidth with finegrained transactions and better multinode scaling.